Shifani, S., Shaqadan, A., Syambabu, V., Verma, V., Siri, D., & Kaliappan, S. (2026). An Efficient VLSI Design Model using Alpha-Beta Filtering and RTree-based Fast Preprocessing with Deep Reinforcement Learning Algorithm. Institute of Electrical and Electronics Engineers Inc. https://doi.org/10.1109/ICIPCN67432.2026.11438623
V. Verma
First name
V.
Last name
Verma
