IP Type
Innovation Patent
Status of IP
PUBLISHED
Title of IP
Pipelined reconfigurable high speed memory optimized distributive arithmetic for 2D DTCWT and inverse DTCWT architecture for level 1 and higher level image analysis and synthesis
IP Filing Date
IP Published / Granted Date
IP Application Number
202141004942
IP Publication / Granted Number
202141004942
Inventors Name
Dr. Cyril Prasanna Raj P
Applicants Name
Cambridge Institute of Technology Bengaluru
Assignees Name
Cambridge Institute of Technology
