Electrostatic characteristics of a high-k stacked gate-all-around heterojunction tunnel field-effect transistor using the superposition principle

We use the superposition method to model the electrostatic characteristics of a high-k stacked gate-all-around heterojunction tunneling field-effect transistor (TFET). The heterojunction is formed from Ge/Si material in the source/channel, respectively. The modeling is accomplished by considering the space-charge regions at the source–channel and drain–channel junctions and in the channel region. The surface potential in the channel region is obtained by applying the superposition principle derived in the source/drain region by solving the two-dimensional (2D) or one-dimensional (1D) Poisson’s equation, respectively. Furthermore, the electric field and the drain current are modeled by using the surface potential and the Kane model, respectively. The results are confirmed using ATLAS technology computer-aided design (TCAD) simulations. © 2021, The Author(s), under exclusive licence to Springer Science+Business Media, LLC, part of Springer Nature.