Impact of material in gate engineering of various TFET architectures

Following Moore's law, semiconductor mainstream electronics (processors, memories, etc.) enjoyed a very dynamic evolution over decades. Key to this success was the continuous scaling of the silicon metal-oxide-semiconductor field-effect transistor (Si MOSFET). In 2020, Si MOSFETs with 20-nm gates is in mass production, currently we are in 7-nm gate, and the International Technology Roadmap for Semiconductors (ITRS) predicts 3-nm technology in future. As the MOSFETs are scaled down to nanometer scales, the prime area of concern becomes the drive current deterioration. This is because of the very high vertical and horizontal electrical fields which reduce the carrier mobility and hence the drive current in scaled devices. Field Effect Transistor is the backbone of semiconductor electronics. It represents the basic building block of systems of modern information and communication technology, and progress in the important field critically depends on rapid improvements of FET performance. An efficient option to achieve the goal is the introduction of novel channel materials into FET technology. In the last decade, the Tunnel Field Effect Transistors (TFETs) have received a significant attention in the semiconductor community, as a promising candidate for future low power high-speed applications. The ambipolar behavior and low ON-state current are the major disadvantages of TFETs, and it can be overcome by introducing gate engineering in various TFET models. The book chapter focused on the various devices to improve the drain current and to reduce the ambipolar behavior such as double material double gate (DMDG) TFET, triple material double gate (TMDG) TFET, double material triple gate (DMTG) TFET, triple material triple gate (TMTG) TFET, double material gate-all-around (DMGAA) TFET, and triple material gate-all-around (TMGAA) TFET. © Springer Nature Singapore Pte Ltd. 2024. All rights reserved.